1/******************************************************************************
2 *
3 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec)
4 *
5 *****************************************************************************/
6
7/*
8 * Copyright (C) 2000 - 2019, Intel Corp.
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions, and the following disclaimer,
16 * without modification.
17 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
18 * substantially similar to the "NO WARRANTY" disclaimer below
19 * ("Disclaimer") and any redistribution must be conditioned upon
20 * including a substantially similar Disclaimer requirement for further
21 * binary redistribution.
22 * 3. Neither the names of the above-listed copyright holders nor the names
23 * of any contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * Alternatively, this software may be distributed under the terms of the
27 * GNU General Public License ("GPL") version 2 as published by the Free
28 * Software Foundation.
29 *
30 * NO WARRANTY
31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
32 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
33 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
34 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
35 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
39 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
40 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
41 * POSSIBILITY OF SUCH DAMAGES.
42 */
43
44#ifndef __ACTBL2_H__
45#define __ACTBL2_H__
46
47
48/*******************************************************************************
49 *
50 * Additional ACPI Tables (2)
51 *
52 * These tables are not consumed directly by the ACPICA subsystem, but are
53 * included here to support device drivers and the AML disassembler.
54 *
55 ******************************************************************************/
56
57
58/*
59 * Values for description table header signatures for tables defined in this
60 * file. Useful because they make it more difficult to inadvertently type in
61 * the wrong signature.
62 */
63#define ACPI_SIG_IORT "IORT" /* IO Remapping Table */
64#define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */
65#define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */
66#define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */
67#define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */
68#define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */
69#define ACPI_SIG_MPST "MPST" /* Memory Power State Table */
70#define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */
71#define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
72#define ACPI_SIG_MTMR "MTMR" /* MID Timer table */
73#define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */
74#define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */
75#define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */
76#define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */
77#define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */
78#define ACPI_SIG_RASF "RASF" /* RAS Feature table */
79#define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */
80#define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */
81#define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
82
83
84/*
85 * All tables must be byte-packed to match the ACPI specification, since
86 * the tables are provided by the system BIOS.
87 */
88#pragma pack(1)
89
90/*
91 * Note: C bitfields are not used for this reason:
92 *
93 * "Bitfields are great and easy to read, but unfortunately the C language
94 * does not specify the layout of bitfields in memory, which means they are
95 * essentially useless for dealing with packed data in on-disk formats or
96 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
97 * this decision was a design error in C. Ritchie could have picked an order
98 * and stuck with it." Norman Ramsey.
99 * See http://stackoverflow.com/a/1053662/41661
100 */
101
102
103/*******************************************************************************
104 *
105 * IORT - IO Remapping Table
106 *
107 * Conforms to "IO Remapping Table System Software on ARM Platforms",
108 * Document number: ARM DEN 0049D, March 2018
109 *
110 ******************************************************************************/
111
112typedef struct acpi_table_iort
113{
114 ACPI_TABLE_HEADER Header;
115 UINT32 NodeCount;
116 UINT32 NodeOffset;
117 UINT32 Reserved;
118
119} ACPI_TABLE_IORT;
120
121
122/*
123 * IORT subtables
124 */
125typedef struct acpi_iort_node
126{
127 UINT8 Type;
128 UINT16 Length;
129 UINT8 Revision;
130 UINT32 Reserved;
131 UINT32 MappingCount;
132 UINT32 MappingOffset;
133 char NodeData[1];
134
135} ACPI_IORT_NODE;
136
137/* Values for subtable Type above */
138
139enum AcpiIortNodeType
140{
141 ACPI_IORT_NODE_ITS_GROUP = 0x00,
142 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
143 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
144 ACPI_IORT_NODE_SMMU = 0x03,
145 ACPI_IORT_NODE_SMMU_V3 = 0x04,
146 ACPI_IORT_NODE_PMCG = 0x05
147};
148
149
150typedef struct acpi_iort_id_mapping
151{
152 UINT32 InputBase; /* Lowest value in input range */
153 UINT32 IdCount; /* Number of IDs */
154 UINT32 OutputBase; /* Lowest value in output range */
155 UINT32 OutputReference; /* A reference to the output node */
156 UINT32 Flags;
157
158} ACPI_IORT_ID_MAPPING;
159
160/* Masks for Flags field above for IORT subtable */
161
162#define ACPI_IORT_ID_SINGLE_MAPPING (1)
163
164
165typedef struct acpi_iort_memory_access
166{
167 UINT32 CacheCoherency;
168 UINT8 Hints;
169 UINT16 Reserved;
170 UINT8 MemoryFlags;
171
172} ACPI_IORT_MEMORY_ACCESS;
173
174/* Values for CacheCoherency field above */
175
176#define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */
177#define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */
178
179/* Masks for Hints field above */
180
181#define ACPI_IORT_HT_TRANSIENT (1)
182#define ACPI_IORT_HT_WRITE (1<<1)
183#define ACPI_IORT_HT_READ (1<<2)
184#define ACPI_IORT_HT_OVERRIDE (1<<3)
185
186/* Masks for MemoryFlags field above */
187
188#define ACPI_IORT_MF_COHERENCY (1)
189#define ACPI_IORT_MF_ATTRIBUTES (1<<1)
190
191
192/*
193 * IORT node specific subtables
194 */
195typedef struct acpi_iort_its_group
196{
197 UINT32 ItsCount;
198 UINT32 Identifiers[1]; /* GIC ITS identifier array */
199
200} ACPI_IORT_ITS_GROUP;
201
202
203typedef struct acpi_iort_named_component
204{
205 UINT32 NodeFlags;
206 UINT64 MemoryProperties; /* Memory access properties */
207 UINT8 MemoryAddressLimit; /* Memory address size limit */
208 char DeviceName[1]; /* Path of namespace object */
209
210} ACPI_IORT_NAMED_COMPONENT;
211
212/* Masks for Flags field above */
213
214#define ACPI_IORT_NC_STALL_SUPPORTED (1)
215#define ACPI_IORT_NC_PASID_BITS (31<<1)
216
217typedef struct acpi_iort_root_complex
218{
219 UINT64 MemoryProperties; /* Memory access properties */
220 UINT32 AtsAttribute;
221 UINT32 PciSegmentNumber;
222 UINT8 MemoryAddressLimit; /* Memory address size limit */
223 UINT8 Reserved[3]; /* Reserved, must be zero */
224
225} ACPI_IORT_ROOT_COMPLEX;
226
227/* Values for AtsAttribute field above */
228
229#define ACPI_IORT_ATS_SUPPORTED 0x00000001 /* The root complex supports ATS */
230#define ACPI_IORT_ATS_UNSUPPORTED 0x00000000 /* The root complex doesn't support ATS */
231
232
233typedef struct acpi_iort_smmu
234{
235 UINT64 BaseAddress; /* SMMU base address */
236 UINT64 Span; /* Length of memory range */
237 UINT32 Model;
238 UINT32 Flags;
239 UINT32 GlobalInterruptOffset;
240 UINT32 ContextInterruptCount;
241 UINT32 ContextInterruptOffset;
242 UINT32 PmuInterruptCount;
243 UINT32 PmuInterruptOffset;
244 UINT64 Interrupts[1]; /* Interrupt array */
245
246} ACPI_IORT_SMMU;
247
248/* Values for Model field above */
249
250#define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */
251#define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */
252#define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */
253#define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */
254#define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */
255#define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */
256
257/* Masks for Flags field above */
258
259#define ACPI_IORT_SMMU_DVM_SUPPORTED (1)
260#define ACPI_IORT_SMMU_COHERENT_WALK (1<<1)
261
262/* Global interrupt format */
263
264typedef struct acpi_iort_smmu_gsi
265{
266 UINT32 NSgIrpt;
267 UINT32 NSgIrptFlags;
268 UINT32 NSgCfgIrpt;
269 UINT32 NSgCfgIrptFlags;
270
271} ACPI_IORT_SMMU_GSI;
272
273
274typedef struct acpi_iort_smmu_v3
275{
276 UINT64 BaseAddress; /* SMMUv3 base address */
277 UINT32 Flags;
278 UINT32 Reserved;
279 UINT64 VatosAddress;
280 UINT32 Model;
281 UINT32 EventGsiv;
282 UINT32 PriGsiv;
283 UINT32 GerrGsiv;
284 UINT32 SyncGsiv;
285 UINT32 Pxm;
286 UINT32 IdMappingIndex;
287
288} ACPI_IORT_SMMU_V3;
289
290/* Values for Model field above */
291
292#define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */
293#define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* HiSilicon Hi161x SMMUv3 */
294#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */
295
296/* Masks for Flags field above */
297
298#define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1)
299#define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1)
300#define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3)
301
302typedef struct acpi_iort_pmcg
303{
304 UINT64 Page0BaseAddress;
305 UINT32 OverflowGsiv;
306 UINT32 NodeReference;
307 UINT64 Page1BaseAddress;
308
309} ACPI_IORT_PMCG;
310
311
312/*******************************************************************************
313 *
314 * IVRS - I/O Virtualization Reporting Structure
315 * Version 1
316 *
317 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification",
318 * Revision 1.26, February 2009.
319 *
320 ******************************************************************************/
321
322typedef struct acpi_table_ivrs
323{
324 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
325 UINT32 Info; /* Common virtualization info */
326 UINT64 Reserved;
327
328} ACPI_TABLE_IVRS;
329
330/* Values for Info field above */
331
332#define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */
333#define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */
334#define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */
335
336
337/* IVRS subtable header */
338
339typedef struct acpi_ivrs_header
340{
341 UINT8 Type; /* Subtable type */
342 UINT8 Flags;
343 UINT16 Length; /* Subtable length */
344 UINT16 DeviceId; /* ID of IOMMU */
345
346} ACPI_IVRS_HEADER;
347
348/* Values for subtable Type above */
349
350enum AcpiIvrsType
351{
352 ACPI_IVRS_TYPE_HARDWARE = 0x10,
353 ACPI_IVRS_TYPE_MEMORY1 = 0x20,
354 ACPI_IVRS_TYPE_MEMORY2 = 0x21,
355 ACPI_IVRS_TYPE_MEMORY3 = 0x22
356};
357
358/* Masks for Flags field above for IVHD subtable */
359
360#define ACPI_IVHD_TT_ENABLE (1)
361#define ACPI_IVHD_PASS_PW (1<<1)
362#define ACPI_IVHD_RES_PASS_PW (1<<2)
363#define ACPI_IVHD_ISOC (1<<3)
364#define ACPI_IVHD_IOTLB (1<<4)
365
366/* Masks for Flags field above for IVMD subtable */
367
368#define ACPI_IVMD_UNITY (1)
369#define ACPI_IVMD_READ (1<<1)
370#define ACPI_IVMD_WRITE (1<<2)
371#define ACPI_IVMD_EXCLUSION_RANGE (1<<3)
372
373
374/*
375 * IVRS subtables, correspond to Type in ACPI_IVRS_HEADER
376 */
377
378/* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */
379
380typedef struct acpi_ivrs_hardware
381{
382 ACPI_IVRS_HEADER Header;
383 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */
384 UINT64 BaseAddress; /* IOMMU control registers */
385 UINT16 PciSegmentGroup;
386 UINT16 Info; /* MSI number and unit ID */
387 UINT32 Reserved;
388
389} ACPI_IVRS_HARDWARE;
390
391/* Masks for Info field above */
392
393#define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */
394#define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, UnitID */
395
396
397/*
398 * Device Entries for IVHD subtable, appear after ACPI_IVRS_HARDWARE structure.
399 * Upper two bits of the Type field are the (encoded) length of the structure.
400 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries
401 * are reserved for future use but not defined.
402 */
403typedef struct acpi_ivrs_de_header
404{
405 UINT8 Type;
406 UINT16 Id;
407 UINT8 DataSetting;
408
409} ACPI_IVRS_DE_HEADER;
410
411/* Length of device entry is in the top two bits of Type field above */
412
413#define ACPI_IVHD_ENTRY_LENGTH 0xC0
414
415/* Values for device entry Type field above */
416
417enum AcpiIvrsDeviceEntryType
418{
419 /* 4-byte device entries, all use ACPI_IVRS_DEVICE4 */
420
421 ACPI_IVRS_TYPE_PAD4 = 0,
422 ACPI_IVRS_TYPE_ALL = 1,
423 ACPI_IVRS_TYPE_SELECT = 2,
424 ACPI_IVRS_TYPE_START = 3,
425 ACPI_IVRS_TYPE_END = 4,
426
427 /* 8-byte device entries */
428
429 ACPI_IVRS_TYPE_PAD8 = 64,
430 ACPI_IVRS_TYPE_NOT_USED = 65,
431 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses ACPI_IVRS_DEVICE8A */
432 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses ACPI_IVRS_DEVICE8A */
433 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses ACPI_IVRS_DEVICE8B */
434 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses ACPI_IVRS_DEVICE8B */
435 ACPI_IVRS_TYPE_SPECIAL = 72 /* Uses ACPI_IVRS_DEVICE8C */
436};
437
438/* Values for Data field above */
439
440#define ACPI_IVHD_INIT_PASS (1)
441#define ACPI_IVHD_EINT_PASS (1<<1)
442#define ACPI_IVHD_NMI_PASS (1<<2)
443#define ACPI_IVHD_SYSTEM_MGMT (3<<4)
444#define ACPI_IVHD_LINT0_PASS (1<<6)
445#define ACPI_IVHD_LINT1_PASS (1<<7)
446
447
448/* Types 0-4: 4-byte device entry */
449
450typedef struct acpi_ivrs_device4
451{
452 ACPI_IVRS_DE_HEADER Header;
453
454} ACPI_IVRS_DEVICE4;
455
456/* Types 66-67: 8-byte device entry */
457
458typedef struct acpi_ivrs_device8a
459{
460 ACPI_IVRS_DE_HEADER Header;
461 UINT8 Reserved1;
462 UINT16 UsedId;
463 UINT8 Reserved2;
464
465} ACPI_IVRS_DEVICE8A;
466
467/* Types 70-71: 8-byte device entry */
468
469typedef struct acpi_ivrs_device8b
470{
471 ACPI_IVRS_DE_HEADER Header;
472 UINT32 ExtendedData;
473
474} ACPI_IVRS_DEVICE8B;
475
476/* Values for ExtendedData above */
477
478#define ACPI_IVHD_ATS_DISABLED (1<<31)
479
480/* Type 72: 8-byte device entry */
481
482typedef struct acpi_ivrs_device8c
483{
484 ACPI_IVRS_DE_HEADER Header;
485 UINT8 Handle;
486 UINT16 UsedId;
487 UINT8 Variety;
488
489} ACPI_IVRS_DEVICE8C;
490
491/* Values for Variety field above */
492
493#define ACPI_IVHD_IOAPIC 1
494#define ACPI_IVHD_HPET 2
495
496
497/* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */
498
499typedef struct acpi_ivrs_memory
500{
501 ACPI_IVRS_HEADER Header;
502 UINT16 AuxData;
503 UINT64 Reserved;
504 UINT64 StartAddress;
505 UINT64 MemoryLength;
506
507} ACPI_IVRS_MEMORY;
508
509
510/*******************************************************************************
511 *
512 * LPIT - Low Power Idle Table
513 *
514 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014.
515 *
516 ******************************************************************************/
517
518typedef struct acpi_table_lpit
519{
520 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
521
522} ACPI_TABLE_LPIT;
523
524
525/* LPIT subtable header */
526
527typedef struct acpi_lpit_header
528{
529 UINT32 Type; /* Subtable type */
530 UINT32 Length; /* Subtable length */
531 UINT16 UniqueId;
532 UINT16 Reserved;
533 UINT32 Flags;
534
535} ACPI_LPIT_HEADER;
536
537/* Values for subtable Type above */
538
539enum AcpiLpitType
540{
541 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00,
542 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */
543};
544
545/* Masks for Flags field above */
546
547#define ACPI_LPIT_STATE_DISABLED (1)
548#define ACPI_LPIT_NO_COUNTER (1<<1)
549
550/*
551 * LPIT subtables, correspond to Type in ACPI_LPIT_HEADER
552 */
553
554/* 0x00: Native C-state instruction based LPI structure */
555
556typedef struct acpi_lpit_native
557{
558 ACPI_LPIT_HEADER Header;
559 ACPI_GENERIC_ADDRESS EntryTrigger;
560 UINT32 Residency;
561 UINT32 Latency;
562 ACPI_GENERIC_ADDRESS ResidencyCounter;
563 UINT64 CounterFrequency;
564
565} ACPI_LPIT_NATIVE;
566
567
568/*******************************************************************************
569 *
570 * MADT - Multiple APIC Description Table
571 * Version 3
572 *
573 ******************************************************************************/
574
575typedef struct acpi_table_madt
576{
577 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
578 UINT32 Address; /* Physical address of local APIC */
579 UINT32 Flags;
580
581} ACPI_TABLE_MADT;
582
583/* Masks for Flags field above */
584
585#define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */
586
587/* Values for PCATCompat flag */
588
589#define ACPI_MADT_DUAL_PIC 1
590#define ACPI_MADT_MULTIPLE_APIC 0
591
592
593/* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */
594
595enum AcpiMadtType
596{
597 ACPI_MADT_TYPE_LOCAL_APIC = 0,
598 ACPI_MADT_TYPE_IO_APIC = 1,
599 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2,
600 ACPI_MADT_TYPE_NMI_SOURCE = 3,
601 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4,
602 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5,
603 ACPI_MADT_TYPE_IO_SAPIC = 6,
604 ACPI_MADT_TYPE_LOCAL_SAPIC = 7,
605 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8,
606 ACPI_MADT_TYPE_LOCAL_X2APIC = 9,
607 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10,
608 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11,
609 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12,
610 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13,
611 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14,
612 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15,
613 ACPI_MADT_TYPE_RESERVED = 16 /* 16 and greater are reserved */
614};
615
616
617/*
618 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER
619 */
620
621/* 0: Processor Local APIC */
622
623typedef struct acpi_madt_local_apic
624{
625 ACPI_SUBTABLE_HEADER Header;
626 UINT8 ProcessorId; /* ACPI processor id */
627 UINT8 Id; /* Processor's local APIC id */
628 UINT32 LapicFlags;
629
630} ACPI_MADT_LOCAL_APIC;
631
632
633/* 1: IO APIC */
634
635typedef struct acpi_madt_io_apic
636{
637 ACPI_SUBTABLE_HEADER Header;
638 UINT8 Id; /* I/O APIC ID */
639 UINT8 Reserved; /* Reserved - must be zero */
640 UINT32 Address; /* APIC physical address */
641 UINT32 GlobalIrqBase; /* Global system interrupt where INTI lines start */
642
643} ACPI_MADT_IO_APIC;
644
645
646/* 2: Interrupt Override */
647
648typedef struct acpi_madt_interrupt_override
649{
650 ACPI_SUBTABLE_HEADER Header;
651 UINT8 Bus; /* 0 - ISA */
652 UINT8 SourceIrq; /* Interrupt source (IRQ) */
653 UINT32 GlobalIrq; /* Global system interrupt */
654 UINT16 IntiFlags;
655
656} ACPI_MADT_INTERRUPT_OVERRIDE;
657
658
659/* 3: NMI Source */
660
661typedef struct acpi_madt_nmi_source
662{
663 ACPI_SUBTABLE_HEADER Header;
664 UINT16 IntiFlags;
665 UINT32 GlobalIrq; /* Global system interrupt */
666
667} ACPI_MADT_NMI_SOURCE;
668
669
670/* 4: Local APIC NMI */
671
672typedef struct acpi_madt_local_apic_nmi
673{
674 ACPI_SUBTABLE_HEADER Header;
675 UINT8 ProcessorId; /* ACPI processor id */
676 UINT16 IntiFlags;
677 UINT8 Lint; /* LINTn to which NMI is connected */
678
679} ACPI_MADT_LOCAL_APIC_NMI;
680
681
682/* 5: Address Override */
683
684typedef struct acpi_madt_local_apic_override
685{
686 ACPI_SUBTABLE_HEADER Header;
687 UINT16 Reserved; /* Reserved, must be zero */
688 UINT64 Address; /* APIC physical address */
689
690} ACPI_MADT_LOCAL_APIC_OVERRIDE;
691
692
693/* 6: I/O Sapic */
694
695typedef struct acpi_madt_io_sapic
696{
697 ACPI_SUBTABLE_HEADER Header;
698 UINT8 Id; /* I/O SAPIC ID */
699 UINT8 Reserved; /* Reserved, must be zero */
700 UINT32 GlobalIrqBase; /* Global interrupt for SAPIC start */
701 UINT64 Address; /* SAPIC physical address */
702
703} ACPI_MADT_IO_SAPIC;
704
705
706/* 7: Local Sapic */
707
708typedef struct acpi_madt_local_sapic
709{
710 ACPI_SUBTABLE_HEADER Header;
711 UINT8 ProcessorId; /* ACPI processor id */
712 UINT8 Id; /* SAPIC ID */
713 UINT8 Eid; /* SAPIC EID */
714 UINT8 Reserved[3]; /* Reserved, must be zero */
715 UINT32 LapicFlags;
716 UINT32 Uid; /* Numeric UID - ACPI 3.0 */
717 char UidString[1]; /* String UID - ACPI 3.0 */
718
719} ACPI_MADT_LOCAL_SAPIC;
720
721
722/* 8: Platform Interrupt Source */
723
724typedef struct acpi_madt_interrupt_source
725{
726 ACPI_SUBTABLE_HEADER Header;
727 UINT16 IntiFlags;
728 UINT8 Type; /* 1=PMI, 2=INIT, 3=corrected */
729 UINT8 Id; /* Processor ID */
730 UINT8 Eid; /* Processor EID */
731 UINT8 IoSapicVector; /* Vector value for PMI interrupts */
732 UINT32 GlobalIrq; /* Global system interrupt */
733 UINT32 Flags; /* Interrupt Source Flags */
734
735} ACPI_MADT_INTERRUPT_SOURCE;
736
737/* Masks for Flags field above */
738
739#define ACPI_MADT_CPEI_OVERRIDE (1)
740
741
742/* 9: Processor Local X2APIC (ACPI 4.0) */
743
744typedef struct acpi_madt_local_x2apic
745{
746 ACPI_SUBTABLE_HEADER Header;
747 UINT16 Reserved; /* Reserved - must be zero */
748 UINT32 LocalApicId; /* Processor x2APIC ID */
749 UINT32 LapicFlags;
750 UINT32 Uid; /* ACPI processor UID */
751
752} ACPI_MADT_LOCAL_X2APIC;
753
754
755/* 10: Local X2APIC NMI (ACPI 4.0) */
756
757typedef struct acpi_madt_local_x2apic_nmi
758{
759 ACPI_SUBTABLE_HEADER Header;
760 UINT16 IntiFlags;
761 UINT32 Uid; /* ACPI processor UID */
762 UINT8 Lint; /* LINTn to which NMI is connected */
763 UINT8 Reserved[3]; /* Reserved - must be zero */
764
765} ACPI_MADT_LOCAL_X2APIC_NMI;
766
767
768/* 11: Generic Interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */
769
770typedef struct acpi_madt_generic_interrupt
771{
772 ACPI_SUBTABLE_HEADER Header;
773 UINT16 Reserved; /* Reserved - must be zero */
774 UINT32 CpuInterfaceNumber;
775 UINT32 Uid;
776 UINT32 Flags;
777 UINT32 ParkingVersion;
778 UINT32 PerformanceInterrupt;
779 UINT64 ParkedAddress;
780 UINT64 BaseAddress;
781 UINT64 GicvBaseAddress;
782 UINT64 GichBaseAddress;
783 UINT32 VgicInterrupt;
784 UINT64 GicrBaseAddress;
785 UINT64 ArmMpidr;
786 UINT8 EfficiencyClass;
787 UINT8 Reserved2[1];
788 UINT16 SpeInterrupt; /* ACPI 6.3 */
789
790} ACPI_MADT_GENERIC_INTERRUPT;
791
792/* Masks for Flags field above */
793
794/* ACPI_MADT_ENABLED (1) Processor is usable if set */
795#define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */
796#define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */
797
798
799/* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */
800
801typedef struct acpi_madt_generic_distributor
802{
803 ACPI_SUBTABLE_HEADER Header;
804 UINT16 Reserved; /* Reserved - must be zero */
805 UINT32 GicId;
806 UINT64 BaseAddress;
807 UINT32 GlobalIrqBase;
808 UINT8 Version;
809 UINT8 Reserved2[3]; /* Reserved - must be zero */
810
811} ACPI_MADT_GENERIC_DISTRIBUTOR;
812
813/* Values for Version field above */
814
815enum AcpiMadtGicVersion
816{
817 ACPI_MADT_GIC_VERSION_NONE = 0,
818 ACPI_MADT_GIC_VERSION_V1 = 1,
819 ACPI_MADT_GIC_VERSION_V2 = 2,
820 ACPI_MADT_GIC_VERSION_V3 = 3,
821 ACPI_MADT_GIC_VERSION_V4 = 4,
822 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */
823};
824
825
826/* 13: Generic MSI Frame (ACPI 5.1) */
827
828typedef struct acpi_madt_generic_msi_frame
829{
830 ACPI_SUBTABLE_HEADER Header;
831 UINT16 Reserved; /* Reserved - must be zero */
832 UINT32 MsiFrameId;
833 UINT64 BaseAddress;
834 UINT32 Flags;
835 UINT16 SpiCount;
836 UINT16 SpiBase;
837
838} ACPI_MADT_GENERIC_MSI_FRAME;
839
840/* Masks for Flags field above */
841
842#define ACPI_MADT_OVERRIDE_SPI_VALUES (1)
843
844
845/* 14: Generic Redistributor (ACPI 5.1) */
846
847typedef struct acpi_madt_generic_redistributor
848{
849 ACPI_SUBTABLE_HEADER Header;
850 UINT16 Reserved; /* reserved - must be zero */
851 UINT64 BaseAddress;
852 UINT32 Length;
853
854} ACPI_MADT_GENERIC_REDISTRIBUTOR;
855
856
857/* 15: Generic Translator (ACPI 6.0) */
858
859typedef struct acpi_madt_generic_translator
860{
861 ACPI_SUBTABLE_HEADER Header;
862 UINT16 Reserved; /* reserved - must be zero */
863 UINT32 TranslationId;
864 UINT64 BaseAddress;
865 UINT32 Reserved2;
866
867} ACPI_MADT_GENERIC_TRANSLATOR;
868
869
870/*
871 * Common flags fields for MADT subtables
872 */
873
874/* MADT Local APIC flags */
875
876#define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */
877
878/* MADT MPS INTI flags (IntiFlags) */
879
880#define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */
881#define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */
882
883/* Values for MPS INTI flags */
884
885#define ACPI_MADT_POLARITY_CONFORMS 0
886#define ACPI_MADT_POLARITY_ACTIVE_HIGH 1
887#define ACPI_MADT_POLARITY_RESERVED 2
888#define ACPI_MADT_POLARITY_ACTIVE_LOW 3
889
890#define ACPI_MADT_TRIGGER_CONFORMS (0)
891#define ACPI_MADT_TRIGGER_EDGE (1<<2)
892#define ACPI_MADT_TRIGGER_RESERVED (2<<2)
893#define ACPI_MADT_TRIGGER_LEVEL (3<<2)
894
895
896/*******************************************************************************
897 *
898 * MCFG - PCI Memory Mapped Configuration table and subtable
899 * Version 1
900 *
901 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005
902 *
903 ******************************************************************************/
904
905typedef struct acpi_table_mcfg
906{
907 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
908 UINT8 Reserved[8];
909
910} ACPI_TABLE_MCFG;
911
912
913/* Subtable */
914
915typedef struct acpi_mcfg_allocation
916{
917 UINT64 Address; /* Base address, processor-relative */
918 UINT16 PciSegment; /* PCI segment group number */
919 UINT8 StartBusNumber; /* Starting PCI Bus number */
920 UINT8 EndBusNumber; /* Final PCI Bus number */
921 UINT32 Reserved;
922
923} ACPI_MCFG_ALLOCATION;
924
925
926/*******************************************************************************
927 *
928 * MCHI - Management Controller Host Interface Table
929 * Version 1
930 *
931 * Conforms to "Management Component Transport Protocol (MCTP) Host
932 * Interface Specification", Revision 1.0.0a, October 13, 2009
933 *
934 ******************************************************************************/
935
936typedef struct acpi_table_mchi
937{
938 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
939 UINT8 InterfaceType;
940 UINT8 Protocol;
941 UINT64 ProtocolData;
942 UINT8 InterruptType;
943 UINT8 Gpe;
944 UINT8 PciDeviceFlag;
945 UINT32 GlobalInterrupt;
946 ACPI_GENERIC_ADDRESS ControlRegister;
947 UINT8 PciSegment;
948 UINT8 PciBus;
949 UINT8 PciDevice;
950 UINT8 PciFunction;
951
952} ACPI_TABLE_MCHI;
953
954
955/*******************************************************************************
956 *
957 * MPST - Memory Power State Table (ACPI 5.0)
958 * Version 1
959 *
960 ******************************************************************************/
961
962#define ACPI_MPST_CHANNEL_INFO \
963 UINT8 ChannelId; \
964 UINT8 Reserved1[3]; \
965 UINT16 PowerNodeCount; \
966 UINT16 Reserved2;
967
968/* Main table */
969
970typedef struct acpi_table_mpst
971{
972 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
973 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
974
975} ACPI_TABLE_MPST;
976
977
978/* Memory Platform Communication Channel Info */
979
980typedef struct acpi_mpst_channel
981{
982 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
983
984} ACPI_MPST_CHANNEL;
985
986
987/* Memory Power Node Structure */
988
989typedef struct acpi_mpst_power_node
990{
991 UINT8 Flags;
992 UINT8 Reserved1;
993 UINT16 NodeId;
994 UINT32 Length;
995 UINT64 RangeAddress;
996 UINT64 RangeLength;
997 UINT32 NumPowerStates;
998 UINT32 NumPhysicalComponents;
999
1000} ACPI_MPST_POWER_NODE;
1001
1002/* Values for Flags field above */
1003
1004#define ACPI_MPST_ENABLED 1
1005#define ACPI_MPST_POWER_MANAGED 2
1006#define ACPI_MPST_HOT_PLUG_CAPABLE 4
1007
1008
1009/* Memory Power State Structure (follows POWER_NODE above) */
1010
1011typedef struct acpi_mpst_power_state
1012{
1013 UINT8 PowerState;
1014 UINT8 InfoIndex;
1015
1016} ACPI_MPST_POWER_STATE;
1017
1018
1019/* Physical Component ID Structure (follows POWER_STATE above) */
1020
1021typedef struct acpi_mpst_component
1022{
1023 UINT16 ComponentId;
1024
1025} ACPI_MPST_COMPONENT;
1026
1027
1028/* Memory Power State Characteristics Structure (follows all POWER_NODEs) */
1029
1030typedef struct acpi_mpst_data_hdr
1031{
1032 UINT16 CharacteristicsCount;
1033 UINT16 Reserved;
1034
1035} ACPI_MPST_DATA_HDR;
1036
1037typedef struct acpi_mpst_power_data
1038{
1039 UINT8 StructureId;
1040 UINT8 Flags;
1041 UINT16 Reserved1;
1042 UINT32 AveragePower;
1043 UINT32 PowerSaving;
1044 UINT64 ExitLatency;
1045 UINT64 Reserved2;
1046
1047} ACPI_MPST_POWER_DATA;
1048
1049/* Values for Flags field above */
1050
1051#define ACPI_MPST_PRESERVE 1
1052#define ACPI_MPST_AUTOENTRY 2
1053#define ACPI_MPST_AUTOEXIT 4
1054
1055
1056/* Shared Memory Region (not part of an ACPI table) */
1057
1058typedef struct acpi_mpst_shared
1059{
1060 UINT32 Signature;
1061 UINT16 PccCommand;
1062 UINT16 PccStatus;
1063 UINT32 CommandRegister;
1064 UINT32 StatusRegister;
1065 UINT32 PowerStateId;
1066 UINT32 PowerNodeId;
1067 UINT64 EnergyConsumed;
1068 UINT64 AveragePower;
1069
1070} ACPI_MPST_SHARED;
1071
1072
1073/*******************************************************************************
1074 *
1075 * MSCT - Maximum System Characteristics Table (ACPI 4.0)
1076 * Version 1
1077 *
1078 ******************************************************************************/
1079
1080typedef struct acpi_table_msct
1081{
1082 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1083 UINT32 ProximityOffset; /* Location of proximity info struct(s) */
1084 UINT32 MaxProximityDomains;/* Max number of proximity domains */
1085 UINT32 MaxClockDomains; /* Max number of clock domains */
1086 UINT64 MaxAddress; /* Max physical address in system */
1087
1088} ACPI_TABLE_MSCT;
1089
1090
1091/* Subtable - Maximum Proximity Domain Information. Version 1 */
1092
1093typedef struct acpi_msct_proximity
1094{
1095 UINT8 Revision;
1096 UINT8 Length;
1097 UINT32 RangeStart; /* Start of domain range */
1098 UINT32 RangeEnd; /* End of domain range */
1099 UINT32 ProcessorCapacity;
1100 UINT64 MemoryCapacity; /* In bytes */
1101
1102} ACPI_MSCT_PROXIMITY;
1103
1104
1105/*******************************************************************************
1106 *
1107 * MSDM - Microsoft Data Management table
1108 *
1109 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)",
1110 * November 29, 2011. Copyright 2011 Microsoft
1111 *
1112 ******************************************************************************/
1113
1114/* Basic MSDM table is only the common ACPI header */
1115
1116typedef struct acpi_table_msdm
1117{
1118 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1119
1120} ACPI_TABLE_MSDM;
1121
1122
1123/*******************************************************************************
1124 *
1125 * MTMR - MID Timer Table
1126 * Version 1
1127 *
1128 * Conforms to "Simple Firmware Interface Specification",
1129 * Draft 0.8.2, Oct 19, 2010
1130 * NOTE: The ACPI MTMR is equivalent to the SFI MTMR table.
1131 *
1132 ******************************************************************************/
1133
1134typedef struct acpi_table_mtmr
1135{
1136 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1137
1138} ACPI_TABLE_MTMR;
1139
1140/* MTMR entry */
1141
1142typedef struct acpi_mtmr_entry
1143{
1144 ACPI_GENERIC_ADDRESS PhysicalAddress;
1145 UINT32 Frequency;
1146 UINT32 Irq;
1147
1148} ACPI_MTMR_ENTRY;
1149
1150
1151/*******************************************************************************
1152 *
1153 * NFIT - NVDIMM Interface Table (ACPI 6.0+)
1154 * Version 1
1155 *
1156 ******************************************************************************/
1157
1158typedef struct acpi_table_nfit
1159{
1160 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1161 UINT32 Reserved; /* Reserved, must be zero */
1162
1163} ACPI_TABLE_NFIT;
1164
1165/* Subtable header for NFIT */
1166
1167typedef struct acpi_nfit_header
1168{
1169 UINT16 Type;
1170 UINT16 Length;
1171
1172} ACPI_NFIT_HEADER;
1173
1174
1175/* Values for subtable type in ACPI_NFIT_HEADER */
1176
1177enum AcpiNfitType
1178{
1179 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0,
1180 ACPI_NFIT_TYPE_MEMORY_MAP = 1,
1181 ACPI_NFIT_TYPE_INTERLEAVE = 2,
1182 ACPI_NFIT_TYPE_SMBIOS = 3,
1183 ACPI_NFIT_TYPE_CONTROL_REGION = 4,
1184 ACPI_NFIT_TYPE_DATA_REGION = 5,
1185 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6,
1186 ACPI_NFIT_TYPE_CAPABILITIES = 7,
1187 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */
1188};
1189
1190/*
1191 * NFIT Subtables
1192 */
1193
1194/* 0: System Physical Address Range Structure */
1195
1196typedef struct acpi_nfit_system_address
1197{
1198 ACPI_NFIT_HEADER Header;
1199 UINT16 RangeIndex;
1200 UINT16 Flags;
1201 UINT32 Reserved; /* Reserved, must be zero */
1202 UINT32 ProximityDomain;
1203 UINT8 RangeGuid[16];
1204 UINT64 Address;
1205 UINT64 Length;
1206 UINT64 MemoryMapping;
1207
1208} ACPI_NFIT_SYSTEM_ADDRESS;
1209
1210/* Flags */
1211
1212#define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */
1213#define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */
1214
1215/* Range Type GUIDs appear in the include/acuuid.h file */
1216
1217
1218/* 1: Memory Device to System Address Range Map Structure */
1219
1220typedef struct acpi_nfit_memory_map
1221{
1222 ACPI_NFIT_HEADER Header;
1223 UINT32 DeviceHandle;
1224 UINT16 PhysicalId;
1225 UINT16 RegionId;
1226 UINT16 RangeIndex;
1227 UINT16 RegionIndex;
1228 UINT64 RegionSize;
1229 UINT64 RegionOffset;
1230 UINT64 Address;
1231 UINT16 InterleaveIndex;
1232 UINT16 InterleaveWays;
1233 UINT16 Flags;
1234 UINT16 Reserved; /* Reserved, must be zero */
1235
1236} ACPI_NFIT_MEMORY_MAP;
1237
1238/* Flags */
1239
1240#define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */
1241#define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */
1242#define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */
1243#define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */
1244#define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */
1245#define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */
1246#define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */
1247
1248
1249/* 2: Interleave Structure */
1250
1251typedef struct acpi_nfit_interleave
1252{
1253 ACPI_NFIT_HEADER Header;
1254 UINT16 InterleaveIndex;
1255 UINT16 Reserved; /* Reserved, must be zero */
1256 UINT32 LineCount;
1257 UINT32 LineSize;
1258 UINT32 LineOffset[1]; /* Variable length */
1259
1260} ACPI_NFIT_INTERLEAVE;
1261
1262
1263/* 3: SMBIOS Management Information Structure */
1264
1265typedef struct acpi_nfit_smbios
1266{
1267 ACPI_NFIT_HEADER Header;
1268 UINT32 Reserved; /* Reserved, must be zero */
1269 UINT8 Data[1]; /* Variable length */
1270
1271} ACPI_NFIT_SMBIOS;
1272
1273
1274/* 4: NVDIMM Control Region Structure */
1275
1276typedef struct acpi_nfit_control_region
1277{
1278 ACPI_NFIT_HEADER Header;
1279 UINT16 RegionIndex;
1280 UINT16 VendorId;
1281 UINT16 DeviceId;
1282 UINT16 RevisionId;
1283 UINT16 SubsystemVendorId;
1284 UINT16 SubsystemDeviceId;
1285 UINT16 SubsystemRevisionId;
1286 UINT8 ValidFields;
1287 UINT8 ManufacturingLocation;
1288 UINT16 ManufacturingDate;
1289 UINT8 Reserved[2]; /* Reserved, must be zero */
1290 UINT32 SerialNumber;
1291 UINT16 Code;
1292 UINT16 Windows;
1293 UINT64 WindowSize;
1294 UINT64 CommandOffset;
1295 UINT64 CommandSize;
1296 UINT64 StatusOffset;
1297 UINT64 StatusSize;
1298 UINT16 Flags;
1299 UINT8 Reserved1[6]; /* Reserved, must be zero */
1300
1301} ACPI_NFIT_CONTROL_REGION;
1302
1303/* Flags */
1304
1305#define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */
1306
1307/* ValidFields bits */
1308
1309#define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */
1310
1311
1312/* 5: NVDIMM Block Data Window Region Structure */
1313
1314typedef struct acpi_nfit_data_region
1315{
1316 ACPI_NFIT_HEADER Header;
1317 UINT16 RegionIndex;
1318 UINT16 Windows;
1319 UINT64 Offset;
1320 UINT64 Size;
1321 UINT64 Capacity;
1322 UINT64 StartAddress;
1323
1324} ACPI_NFIT_DATA_REGION;
1325
1326
1327/* 6: Flush Hint Address Structure */
1328
1329typedef struct acpi_nfit_flush_address
1330{
1331 ACPI_NFIT_HEADER Header;
1332 UINT32 DeviceHandle;
1333 UINT16 HintCount;
1334 UINT8 Reserved[6]; /* Reserved, must be zero */
1335 UINT64 HintAddress[1]; /* Variable length */
1336
1337} ACPI_NFIT_FLUSH_ADDRESS;
1338
1339
1340/* 7: Platform Capabilities Structure */
1341
1342typedef struct acpi_nfit_capabilities
1343{
1344 ACPI_NFIT_HEADER Header;
1345 UINT8 HighestCapability;
1346 UINT8 Reserved[3]; /* Reserved, must be zero */
1347 UINT32 Capabilities;
1348 UINT32 Reserved2;
1349
1350} ACPI_NFIT_CAPABILITIES;
1351
1352/* Capabilities Flags */
1353
1354#define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */
1355#define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */
1356#define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */
1357
1358
1359/*
1360 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM
1361 */
1362typedef struct nfit_device_handle
1363{
1364 UINT32 Handle;
1365
1366} NFIT_DEVICE_HANDLE;
1367
1368/* Device handle construction and extraction macros */
1369
1370#define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F
1371#define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0
1372#define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00
1373#define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000
1374#define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000
1375
1376#define ACPI_NFIT_DIMM_NUMBER_OFFSET 0
1377#define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4
1378#define ACPI_NFIT_MEMORY_ID_OFFSET 8
1379#define ACPI_NFIT_SOCKET_ID_OFFSET 12
1380#define ACPI_NFIT_NODE_ID_OFFSET 16
1381
1382/* Macro to construct a NFIT/NVDIMM device handle */
1383
1384#define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \
1385 ((dimm) | \
1386 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \
1387 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \
1388 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \
1389 ((node) << ACPI_NFIT_NODE_ID_OFFSET))
1390
1391/* Macros to extract individual fields from a NFIT/NVDIMM device handle */
1392
1393#define ACPI_NFIT_GET_DIMM_NUMBER(handle) \
1394 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK)
1395
1396#define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \
1397 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET)
1398
1399#define ACPI_NFIT_GET_MEMORY_ID(handle) \
1400 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET)
1401
1402#define ACPI_NFIT_GET_SOCKET_ID(handle) \
1403 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET)
1404
1405#define ACPI_NFIT_GET_NODE_ID(handle) \
1406 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET)
1407
1408
1409/*******************************************************************************
1410 *
1411 * PCCT - Platform Communications Channel Table (ACPI 5.0)
1412 * Version 2 (ACPI 6.2)
1413 *
1414 ******************************************************************************/
1415
1416typedef struct acpi_table_pcct
1417{
1418 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1419 UINT32 Flags;
1420 UINT64 Reserved;
1421
1422} ACPI_TABLE_PCCT;
1423
1424/* Values for Flags field above */
1425
1426#define ACPI_PCCT_DOORBELL 1
1427
1428/* Values for subtable type in ACPI_SUBTABLE_HEADER */
1429
1430enum AcpiPcctType
1431{
1432 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0,
1433 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1,
1434 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */
1435 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */
1436 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */
1437 ACPI_PCCT_TYPE_RESERVED = 5 /* 5 and greater are reserved */
1438};
1439
1440/*
1441 * PCCT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER
1442 */
1443
1444/* 0: Generic Communications Subspace */
1445
1446typedef struct acpi_pcct_subspace
1447{
1448 ACPI_SUBTABLE_HEADER Header;
1449 UINT8 Reserved[6];
1450 UINT64 BaseAddress;
1451 UINT64 Length;
1452 ACPI_GENERIC_ADDRESS DoorbellRegister;
1453 UINT64 PreserveMask;
1454 UINT64 WriteMask;
1455 UINT32 Latency;
1456 UINT32 MaxAccessRate;
1457 UINT16 MinTurnaroundTime;
1458
1459} ACPI_PCCT_SUBSPACE;
1460
1461
1462/* 1: HW-reduced Communications Subspace (ACPI 5.1) */
1463
1464typedef struct acpi_pcct_hw_reduced
1465{
1466 ACPI_SUBTABLE_HEADER Header;
1467 UINT32 PlatformInterrupt;
1468 UINT8 Flags;
1469 UINT8 Reserved;
1470 UINT64 BaseAddress;
1471 UINT64 Length;
1472 ACPI_GENERIC_ADDRESS DoorbellRegister;
1473 UINT64 PreserveMask;
1474 UINT64 WriteMask;
1475 UINT32 Latency;
1476 UINT32 MaxAccessRate;
1477 UINT16 MinTurnaroundTime;
1478
1479} ACPI_PCCT_HW_REDUCED;
1480
1481
1482/* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */
1483
1484typedef struct acpi_pcct_hw_reduced_type2
1485{
1486 ACPI_SUBTABLE_HEADER Header;
1487 UINT32 PlatformInterrupt;
1488 UINT8 Flags;
1489 UINT8 Reserved;
1490 UINT64 BaseAddress;
1491 UINT64 Length;
1492 ACPI_GENERIC_ADDRESS DoorbellRegister;
1493 UINT64 PreserveMask;
1494 UINT64 WriteMask;
1495 UINT32 Latency;
1496 UINT32 MaxAccessRate;
1497 UINT16 MinTurnaroundTime;
1498 ACPI_GENERIC_ADDRESS PlatformAckRegister;
1499 UINT64 AckPreserveMask;
1500 UINT64 AckWriteMask;
1501
1502} ACPI_PCCT_HW_REDUCED_TYPE2;
1503
1504
1505/* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */
1506
1507typedef struct acpi_pcct_ext_pcc_master
1508{
1509 ACPI_SUBTABLE_HEADER Header;
1510 UINT32 PlatformInterrupt;
1511 UINT8 Flags;
1512 UINT8 Reserved1;
1513 UINT64 BaseAddress;
1514 UINT32 Length;
1515 ACPI_GENERIC_ADDRESS DoorbellRegister;
1516 UINT64 PreserveMask;
1517 UINT64 WriteMask;
1518 UINT32 Latency;
1519 UINT32 MaxAccessRate;
1520 UINT32 MinTurnaroundTime;
1521 ACPI_GENERIC_ADDRESS PlatformAckRegister;
1522 UINT64 AckPreserveMask;
1523 UINT64 AckSetMask;
1524 UINT64 Reserved2;
1525 ACPI_GENERIC_ADDRESS CmdCompleteRegister;
1526 UINT64 CmdCompleteMask;
1527 ACPI_GENERIC_ADDRESS CmdUpdateRegister;
1528 UINT64 CmdUpdatePreserveMask;
1529 UINT64 CmdUpdateSetMask;
1530 ACPI_GENERIC_ADDRESS ErrorStatusRegister;
1531 UINT64 ErrorStatusMask;
1532
1533} ACPI_PCCT_EXT_PCC_MASTER;
1534
1535
1536/* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */
1537
1538typedef struct acpi_pcct_ext_pcc_slave
1539{
1540 ACPI_SUBTABLE_HEADER Header;
1541 UINT32 PlatformInterrupt;
1542 UINT8 Flags;
1543 UINT8 Reserved1;
1544 UINT64 BaseAddress;
1545 UINT32 Length;
1546 ACPI_GENERIC_ADDRESS DoorbellRegister;
1547 UINT64 PreserveMask;
1548 UINT64 WriteMask;
1549 UINT32 Latency;
1550 UINT32 MaxAccessRate;
1551 UINT32 MinTurnaroundTime;
1552 ACPI_GENERIC_ADDRESS PlatformAckRegister;
1553 UINT64 AckPreserveMask;
1554 UINT64 AckSetMask;
1555 UINT64 Reserved2;
1556 ACPI_GENERIC_ADDRESS CmdCompleteRegister;
1557 UINT64 CmdCompleteMask;
1558 ACPI_GENERIC_ADDRESS CmdUpdateRegister;
1559 UINT64 CmdUpdatePreserveMask;
1560 UINT64 CmdUpdateSetMask;
1561 ACPI_GENERIC_ADDRESS ErrorStatusRegister;
1562 UINT64 ErrorStatusMask;
1563
1564} ACPI_PCCT_EXT_PCC_SLAVE;
1565
1566
1567/* Values for doorbell flags above */
1568
1569#define ACPI_PCCT_INTERRUPT_POLARITY (1)
1570#define ACPI_PCCT_INTERRUPT_MODE (1<<1)
1571
1572
1573/*
1574 * PCC memory structures (not part of the ACPI table)
1575 */
1576
1577/* Shared Memory Region */
1578
1579typedef struct acpi_pcct_shared_memory
1580{
1581 UINT32 Signature;
1582 UINT16 Command;
1583 UINT16 Status;
1584
1585} ACPI_PCCT_SHARED_MEMORY;
1586
1587
1588/* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */
1589
1590typedef struct acpi_pcct_ext_pcc_shared_memory
1591{
1592 UINT32 Signature;
1593 UINT32 Flags;
1594 UINT32 Length;
1595 UINT32 Command;
1596
1597} ACPI_PCCT_EXT_PCC_SHARED_MEMORY;
1598
1599
1600/*******************************************************************************
1601 *
1602 * PDTT - Platform Debug Trigger Table (ACPI 6.2)
1603 * Version 0
1604 *
1605 ******************************************************************************/
1606
1607typedef struct acpi_table_pdtt
1608{
1609 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1610 UINT8 TriggerCount;
1611 UINT8 Reserved[3];
1612 UINT32 ArrayOffset;
1613
1614} ACPI_TABLE_PDTT;
1615
1616
1617/*
1618 * PDTT Communication Channel Identifier Structure.
1619 * The number of these structures is defined by TriggerCount above,
1620 * starting at ArrayOffset.
1621 */
1622typedef struct acpi_pdtt_channel
1623{
1624 UINT8 SubchannelId;
1625 UINT8 Flags;
1626
1627} ACPI_PDTT_CHANNEL;
1628
1629/* Flags for above */
1630
1631#define ACPI_PDTT_RUNTIME_TRIGGER (1)
1632#define ACPI_PDTT_WAIT_COMPLETION (1<<1)
1633#define ACPI_PDTT_TRIGGER_ORDER (1<<2)
1634
1635
1636/*******************************************************************************
1637 *
1638 * PMTT - Platform Memory Topology Table (ACPI 5.0)
1639 * Version 1
1640 *
1641 ******************************************************************************/
1642
1643typedef struct acpi_table_pmtt
1644{
1645 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1646 UINT32 Reserved;
1647
1648} ACPI_TABLE_PMTT;
1649
1650
1651/* Common header for PMTT subtables that follow main table */
1652
1653typedef struct acpi_pmtt_header
1654{
1655 UINT8 Type;
1656 UINT8 Reserved1;
1657 UINT16 Length;
1658 UINT16 Flags;
1659 UINT16 Reserved2;
1660
1661} ACPI_PMTT_HEADER;
1662
1663/* Values for Type field above */
1664
1665#define ACPI_PMTT_TYPE_SOCKET 0
1666#define ACPI_PMTT_TYPE_CONTROLLER 1
1667#define ACPI_PMTT_TYPE_DIMM 2
1668#define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFF are reserved */
1669
1670/* Values for Flags field above */
1671
1672#define ACPI_PMTT_TOP_LEVEL 0x0001
1673#define ACPI_PMTT_PHYSICAL 0x0002
1674#define ACPI_PMTT_MEMORY_TYPE 0x000C
1675
1676
1677/*
1678 * PMTT subtables, correspond to Type in acpi_pmtt_header
1679 */
1680
1681
1682/* 0: Socket Structure */
1683
1684typedef struct acpi_pmtt_socket
1685{
1686 ACPI_PMTT_HEADER Header;
1687 UINT16 SocketId;
1688 UINT16 Reserved;
1689
1690} ACPI_PMTT_SOCKET;
1691
1692
1693/* 1: Memory Controller subtable */
1694
1695typedef struct acpi_pmtt_controller
1696{
1697 ACPI_PMTT_HEADER Header;
1698 UINT32 ReadLatency;
1699 UINT32 WriteLatency;
1700 UINT32 ReadBandwidth;
1701 UINT32 WriteBandwidth;
1702 UINT16 AccessWidth;
1703 UINT16 Alignment;
1704 UINT16 Reserved;
1705 UINT16 DomainCount;
1706
1707} ACPI_PMTT_CONTROLLER;
1708
1709/* 1a: Proximity Domain substructure */
1710
1711typedef struct acpi_pmtt_domain
1712{
1713 UINT32 ProximityDomain;
1714
1715} ACPI_PMTT_DOMAIN;
1716
1717
1718/* 2: Physical Component Identifier (DIMM) */
1719
1720typedef struct acpi_pmtt_physical_component
1721{
1722 ACPI_PMTT_HEADER Header;
1723 UINT16 ComponentId;
1724 UINT16 Reserved;
1725 UINT32 MemorySize;
1726 UINT32 BiosHandle;
1727
1728} ACPI_PMTT_PHYSICAL_COMPONENT;
1729
1730
1731/*******************************************************************************
1732 *
1733 * PPTT - Processor Properties Topology Table (ACPI 6.2)
1734 * Version 1
1735 *
1736 ******************************************************************************/
1737
1738typedef struct acpi_table_pptt
1739{
1740 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1741
1742} ACPI_TABLE_PPTT;
1743
1744/* Values for Type field above */
1745
1746enum AcpiPpttType
1747{
1748 ACPI_PPTT_TYPE_PROCESSOR = 0,
1749 ACPI_PPTT_TYPE_CACHE = 1,
1750 ACPI_PPTT_TYPE_ID = 2,
1751 ACPI_PPTT_TYPE_RESERVED = 3
1752};
1753
1754
1755/* 0: Processor Hierarchy Node Structure */
1756
1757typedef struct acpi_pptt_processor
1758{
1759 ACPI_SUBTABLE_HEADER Header;
1760 UINT16 Reserved;
1761 UINT32 Flags;
1762 UINT32 Parent;
1763 UINT32 AcpiProcessorId;
1764 UINT32 NumberOfPrivResources;
1765
1766} ACPI_PPTT_PROCESSOR;
1767
1768/* Flags */
1769
1770#define ACPI_PPTT_PHYSICAL_PACKAGE (1)
1771#define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1)
1772#define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */
1773#define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */
1774#define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */
1775
1776
1777/* 1: Cache Type Structure */
1778
1779typedef struct acpi_pptt_cache
1780{
1781 ACPI_SUBTABLE_HEADER Header;
1782 UINT16 Reserved;
1783 UINT32 Flags;
1784 UINT32 NextLevelOfCache;
1785 UINT32 Size;
1786 UINT32 NumberOfSets;
1787 UINT8 Associativity;
1788 UINT8 Attributes;
1789 UINT16 LineSize;
1790
1791} ACPI_PPTT_CACHE;
1792
1793/* Flags */
1794
1795#define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */
1796#define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */
1797#define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */
1798#define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */
1799#define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */
1800#define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */
1801#define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */
1802
1803/* Masks for Attributes */
1804
1805#define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */
1806#define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */
1807#define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */
1808
1809/* Attributes describing cache */
1810#define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */
1811#define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */
1812#define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */
1813#define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */
1814
1815#define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */
1816#define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */
1817#define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */
1818#define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */
1819
1820#define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */
1821#define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */
1822
1823/* 2: ID Structure */
1824
1825typedef struct acpi_pptt_id
1826{
1827 ACPI_SUBTABLE_HEADER Header;
1828 UINT16 Reserved;
1829 UINT32 VendorId;
1830 UINT64 Level1Id;
1831 UINT64 Level2Id;
1832 UINT16 MajorRev;
1833 UINT16 MinorRev;
1834 UINT16 SpinRev;
1835
1836} ACPI_PPTT_ID;
1837
1838
1839/*******************************************************************************
1840 *
1841 * RASF - RAS Feature Table (ACPI 5.0)
1842 * Version 1
1843 *
1844 ******************************************************************************/
1845
1846typedef struct acpi_table_rasf
1847{
1848 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1849 UINT8 ChannelId[12];
1850
1851} ACPI_TABLE_RASF;
1852
1853/* RASF Platform Communication Channel Shared Memory Region */
1854
1855typedef struct acpi_rasf_shared_memory
1856{
1857 UINT32 Signature;
1858 UINT16 Command;
1859 UINT16 Status;
1860 UINT16 Version;
1861 UINT8 Capabilities[16];
1862 UINT8 SetCapabilities[16];
1863 UINT16 NumParameterBlocks;
1864 UINT32 SetCapabilitiesStatus;
1865
1866} ACPI_RASF_SHARED_MEMORY;
1867
1868/* RASF Parameter Block Structure Header */
1869
1870typedef struct acpi_rasf_parameter_block
1871{
1872 UINT16 Type;
1873 UINT16 Version;
1874 UINT16 Length;
1875
1876} ACPI_RASF_PARAMETER_BLOCK;
1877
1878/* RASF Parameter Block Structure for PATROL_SCRUB */
1879
1880typedef struct acpi_rasf_patrol_scrub_parameter
1881{
1882 ACPI_RASF_PARAMETER_BLOCK Header;
1883 UINT16 PatrolScrubCommand;
1884 UINT64 RequestedAddressRange[2];
1885 UINT64 ActualAddressRange[2];
1886 UINT16 Flags;
1887 UINT8 RequestedSpeed;
1888
1889} ACPI_RASF_PATROL_SCRUB_PARAMETER;
1890
1891/* Masks for Flags and Speed fields above */
1892
1893#define ACPI_RASF_SCRUBBER_RUNNING 1
1894#define ACPI_RASF_SPEED (7<<1)
1895#define ACPI_RASF_SPEED_SLOW (0<<1)
1896#define ACPI_RASF_SPEED_MEDIUM (4<<1)
1897#define ACPI_RASF_SPEED_FAST (7<<1)
1898
1899/* Channel Commands */
1900
1901enum AcpiRasfCommands
1902{
1903 ACPI_RASF_EXECUTE_RASF_COMMAND = 1
1904};
1905
1906/* Platform RAS Capabilities */
1907
1908enum AcpiRasfCapabiliities
1909{
1910 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0,
1911 ACPI_SW_PATROL_SCRUB_EXPOSED = 1
1912};
1913
1914/* Patrol Scrub Commands */
1915
1916enum AcpiRasfPatrolScrubCommands
1917{
1918 ACPI_RASF_GET_PATROL_PARAMETERS = 1,
1919 ACPI_RASF_START_PATROL_SCRUBBER = 2,
1920 ACPI_RASF_STOP_PATROL_SCRUBBER = 3
1921};
1922
1923/* Channel Command flags */
1924
1925#define ACPI_RASF_GENERATE_SCI (1<<15)
1926
1927/* Status values */
1928
1929enum AcpiRasfStatus
1930{
1931 ACPI_RASF_SUCCESS = 0,
1932 ACPI_RASF_NOT_VALID = 1,
1933 ACPI_RASF_NOT_SUPPORTED = 2,
1934 ACPI_RASF_BUSY = 3,
1935 ACPI_RASF_FAILED = 4,
1936 ACPI_RASF_ABORTED = 5,
1937 ACPI_RASF_INVALID_DATA = 6
1938};
1939
1940/* Status flags */
1941
1942#define ACPI_RASF_COMMAND_COMPLETE (1)
1943#define ACPI_RASF_SCI_DOORBELL (1<<1)
1944#define ACPI_RASF_ERROR (1<<2)
1945#define ACPI_RASF_STATUS (0x1F<<3)
1946
1947
1948/*******************************************************************************
1949 *
1950 * SBST - Smart Battery Specification Table
1951 * Version 1
1952 *
1953 ******************************************************************************/
1954
1955typedef struct acpi_table_sbst
1956{
1957 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1958 UINT32 WarningLevel;
1959 UINT32 LowLevel;
1960 UINT32 CriticalLevel;
1961
1962} ACPI_TABLE_SBST;
1963
1964
1965/*******************************************************************************
1966 *
1967 * SDEI - Software Delegated Exception Interface Descriptor Table
1968 *
1969 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A,
1970 * May 8th, 2017. Copyright 2017 ARM Ltd.
1971 *
1972 ******************************************************************************/
1973
1974typedef struct acpi_table_sdei
1975{
1976 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1977
1978} ACPI_TABLE_SDEI;
1979
1980
1981/*******************************************************************************
1982 *
1983 * SDEV - Secure Devices Table (ACPI 6.2)
1984 * Version 1
1985 *
1986 ******************************************************************************/
1987
1988typedef struct acpi_table_sdev
1989{
1990 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1991
1992} ACPI_TABLE_SDEV;
1993
1994
1995typedef struct acpi_sdev_header
1996{
1997 UINT8 Type;
1998 UINT8 Flags;
1999 UINT16 Length;
2000
2001} ACPI_SDEV_HEADER;
2002
2003
2004/* Values for subtable type above */
2005
2006enum AcpiSdevType
2007{
2008 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0,
2009 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1,
2010 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */
2011};
2012
2013/* Values for flags above */
2014
2015#define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1)
2016
2017/*
2018 * SDEV subtables
2019 */
2020
2021/* 0: Namespace Device Based Secure Device Structure */
2022
2023typedef struct acpi_sdev_namespace
2024{
2025 ACPI_SDEV_HEADER Header;
2026 UINT16 DeviceIdOffset;
2027 UINT16 DeviceIdLength;
2028 UINT16 VendorDataOffset;
2029 UINT16 VendorDataLength;
2030
2031} ACPI_SDEV_NAMESPACE;
2032
2033/* 1: PCIe Endpoint Device Based Device Structure */
2034
2035typedef struct acpi_sdev_pcie
2036{
2037 ACPI_SDEV_HEADER Header;
2038 UINT16 Segment;
2039 UINT16 StartBus;
2040 UINT16 PathOffset;
2041 UINT16 PathLength;
2042 UINT16 VendorDataOffset;
2043 UINT16 VendorDataLength;
2044
2045} ACPI_SDEV_PCIE;
2046
2047/* 1a: PCIe Endpoint path entry */
2048
2049typedef struct acpi_sdev_pcie_path
2050{
2051 UINT8 Device;
2052 UINT8 Function;
2053
2054} ACPI_SDEV_PCIE_PATH;
2055
2056
2057/* Reset to default packing */
2058
2059#pragma pack()
2060
2061#endif /* __ACTBL2_H__ */
2062